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UID:pretalx-eu-summit-2026-YLJJMH@cfp.riscv-europe.org
DTSTART;TZID=CET:20260609T132000
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DESCRIPTION:We present the development flow and platform we have built to s
 upport CHERI development and ratification of the RVY extension. CHERI is a
 n ISA extension providing hardware support for capabilities - unforgeable 
 memory references embedding a memory address as well as bounds and permiss
 ions metadata. It enables spatial and temporal memory safety by design. We
  have developed a comprehensive workflow used to validate the proposed RVY
  extension both for functionality and performance. We maintain and make us
 e of a formal golden model\, which we leverage for design verification eff
 ort through directed-random fuzz testing of architectural features under d
 evelopment. We gather core CHERI functionalities in a reusable RTL library
  to use across multiple commercial and research implementations\, maximisi
 ng reuse of verification effort. We build and boot soft-core images of CHE
 RI-enabled systems on FPGA at scale\, enabling software development and pe
 rformance\nevaluation of RV64Y microarchitectures and software stacks. Thi
 s infrastructure has enabled rapid convergence for the development of the 
 RVY extension with a high level of confidence in functionality and perform
 ance. We are now making use of this infrastructure to further enable vario
 us streams of research.
DTSTAMP:20260522T162355Z
LOCATION:Poster Island A
SUMMARY:CHERI RVY development support platform - Alexandre Joannou
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/YLJJMH/
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