Building on the long-standing use of programmable system-on-chips (SoCs) for edge computing in other domains, this work explores their early adoption in application-specific integrated circuit (ASIC) designs for high-energy physics (HEP) experiments, targeting optimization from design through in-field operation. From front-end detector readout in harsh radiation environments to infrastructure monitoring such as beam and radiation level surveillance, radiation-hardened ASIC SoCs could benefit a range of HEP applications. Current efforts focus on programmable SoCs for control tasks and local data processing such as chip calibration, with physics data processing remaining a longer-term prospect. Beyond HEP, such fault-tolerant techniques, including triple modular redundancy (TMR), hardened interconnects, and memory protection, are equally applicable to safety-critical embedded controllers in domains such as automotive and industrial control systems. In this context, SoCMake, part of the System-on-Chip Radiation-Tolerant Ecosystem (SOCRATES), is being actively developed and used to produce prototype chips. One such chip is TriglaV , a fully radiation-hardened prototype ASIC designed for reliable operation in the radiation environment typical of Large Hadron Collider (LHC) detector front-end electronics. This paper reports on the current status of SOCRATES/SoCMake and the test results of TriglaV, as well as the ongoing work and future directions for the platform.