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UID:pretalx-eu-summit-2026-G7YSXG@cfp.riscv-europe.org
DTSTART;TZID=CET:20260610T164500
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DESCRIPTION:Energy saving is a top priority for STMicroelectronics products
 . For the STxP5 embedded CPU based on the RISC-V architecture\, there is a
  particular focus on minimizing static power when the core is inactive. Ad
 ditionally\, it is important to optimize the CPU restart time\, silicon ar
 ea\, implementation complexity\, and software overhead. The Ultra Low Powe
 r Retention with Warm Restart Mode addresses these challenges by maximizin
 g power savings and reducing drawbacks typically associated with resuming 
 operation. This solution leverages the modular\, scalable\, customizable\,
  and extensible nature of the RISC-V architecture by defining and implemen
 ting a custom RISC-V extension and tailored microarchitecture.
DTSTAMP:20260522T162437Z
LOCATION:Plenary
SUMMARY:Ultra Low Power RISC-V core:  Retention with Warm Restart Extension
  - Anne Merlande
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/G7YSXG/
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