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UID:pretalx-eu-summit-2026-U38PRX@cfp.riscv-europe.org
DTSTART;TZID=CET:20260611T131000
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DESCRIPTION:The increasing computational demands of modern AI workloads nec
 essitate a holistic architectural approach to AI acceleration on RISC-V pr
 ocessors. This talk presents the XuanTie Tensor Processing Engine (TPE)\, 
 a RISC-V-based Attached Matrix Extension (AME) engine designed to address 
 AI acceleration across three dimensions: ISA\, microarchitecture\, and sof
 tware ecosystem.\nAt the ISA level\, the TPE adopts the in-progress RISC-V
  AME specification\, featuring dedicated tensor registers and a comprehens
 ive instruction set encompassing matrix multiply-accumulate\, element-wise
 \, special function\, reduction\, and load/store operations with broad dat
 a type support including INT4\, FP8\, FP16\, and micro-scaling formats. \n
 At the microarchitecture level\, the design incorporates a matrix engine a
 chieving 2 TOPS/GHz at INT8/FP8\, a concurrent vector engine with hardware
 -accelerated non-linear functions\, and a layered memory subsystem featuri
 ng a coherent tensor cache and data prefetch engine. \nA full-stack softwa
 re ecosystem spanning LLVM toolchain to graph execution runtime completes 
 the solution.\nExperimental results on the XuanTie C930 cluster demonstrat
 e 99% FP16 GEMM utilization. We discuss key design trade-offs and implicat
 ions for the evolving RISC-V AME standard.
DTSTAMP:20260522T162356Z
LOCATION:Poster Island B
SUMMARY:A Holistic Approach to Attached Matrix Extension on RISC-V From ISA
  to Software Stack - Qiu Jing
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/U38PRX/
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