The Fast Fourier Transform (FFT) is a fundamental algorithm in embedded and edge signal processing applications, including audio and speech processing, radar systems, and biomedical sensing, where real-time performance must be achieved under strict area and power constraints. Conventional approaches typically rely on dedicated standalone accelerators, but these often impose significant area and power overheads that are impractical for resource-constrained embedded and edge platforms. To address this, tightly-coupled acceleration within the CPU pipeline offers a more efficient alternative by delivering substantial performance gains without requiring an independent hardware block. This paper presents APEX, a tightly-coupled coprocessor integrated with the CV32A6 32-bit RISC-V processor, designed to provide high-performance FFT acceleration for embedded RISC-V systems. For a fixed-point FFT of size N=512, APEX achieves an 83.5% reduction in execution cycles and an 87.9% reduction in instruction count compared to the software FFT implementation on the baseline CV32A6, while preserving the baseline operating frequency and full RV32IM_Zicsr software compatibility with only minimal area overhead. These results demonstrate that APEX is an efficient and practical solution for accelerating FFT-intensive workloads in embedded and edge deployments built on open RISC-V architectures.