Rubén Padial-Allué
Rubén Padial-Allué received the B.Sc. degree in industrial electronics engineering from the University of Granada, Spain, in 2016, and the M.Sc. degree in microelectronics from the University of Sevilla, Spain, in 2020. In February 2023, he joined the Department of Electronics and Computer Technology at the University of Granada as part of a research project, and is currently finishing his PhD on the implementation and optimization of artificial neural networks for hardware acceleration on FPGA devices. His current research interests include embedded systems, FPGAs, and their applications in the field of artificial intelligence.
Session
This paper presents a compact FPGA-based controller for Reconfigurable Intelligent Surfaces (RIS) that integrates an embedded RISC-V processor and dedicated hardware control within a single device. The proposed architecture targets a 15×15 mechanical RIS prototype driven by stepper motor actuators. The embedded RISC-V processor accesses the RIS controller through a lightweight memory-mapped interface, enabling software-programmable RIS reconfiguration while fully abstracting low-level actuation details. By integrating processing and control within the same FPGA, the proposed platform eliminates the need for external computing units and reduces communication latency.