Qi Shao
I am a PhD student in Chamers University of Technology and currently in Barcelona Supercomputing Center. My research is about optimizating performance of memory system for CPU and GPU workloads. I am familiar with CPU/GPU archiecture and also gem5 and accel-sim simulators.
Session
The gem5 simulator is a widely used tool for microarchitectural research, but often incurs prohibitive execution times. gem5 mitigates this cost through checkpoint-based resumption, yet existing checkpoint-generation mechanisms remain slow, non-portable, or both---significantly limiting iterative hardware-software exploration.
We introduce QUICK (QEMU Internal Checkpointing for gem5), a framework that enables fast, automated, and deterministic generation of gem5-compatible checkpoints directly within QEMU.
QUICK integrates full-system checkpointing into QEMU’s TCG engine, capturing architectural, memory, and essential device state without external orchestration. QUICK substantially reduces checkpoint-generation overhead while preserving existing gem5 workflows, enabling scalable and systematic microarchitectural studies.
Initial validation demonstrates correct cross-simulator state transfer and consistent workload resumption.