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UID:pretalx-eu-summit-2026-RUUDYM@cfp.riscv-europe.org
DTSTART;TZID=CET:20260610T132000
DTEND;TZID=CET:20260610T133000
DESCRIPTION:The complexity of modern electronic systems has increased signi
 ficantly over the past decades due to continuous technological advances. T
 o cope with this growing complexity\, data structures\, algorithms\, and t
 he underlying hardware platforms used in Electronic Design Automation (EDA
 ) must be continuously improved. Decision Diagrams (DDs) constitute a fund
 amental graph-based structure for formal verification\, enabling efficient
  representation and algorithmic manipulation of switching functions. Owing
  to their practical relevance\, numerous optimizations have been incorpora
 ted into existing DD software packages. However\, these optimizations are 
 typically designed in an architecture-agnostic manner and do not explicitl
 y exploit characteristics of a specific target platform. As a consequence\
 , architecture-specific optimization opportunities may remain untapped. In
  this work\, a transaction-level analysis of a representative DD package i
 s conducted using a RISC-V-based trace analysis tool to investigate this p
 otential. The study reveals recurring instruction sequences with strong po
 tential for hardware-level aggregation\, enabling more efficient hardware 
 designs. Furthermore\, the derived insights provide guidance for higher-le
 vel software optimizations.
DTSTAMP:20260522T162735Z
LOCATION:Poster Island B
SUMMARY:Transaction-Level Analysis and Optimization of Decision Diagram Pac
 kages on RISC-V - Rune Krauss
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/RUUDYM/
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