BEGIN:VCALENDAR VERSION:2.0 PRODID:-//pretalx//cfp.riscv-europe.org//eu-summit-2026//speaker//KNTSHY BEGIN:VTIMEZONE TZID:CET BEGIN:STANDARD DTSTART:20001029T040000 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10 TZNAME:CET TZOFFSETFROM:+0200 TZOFFSETTO:+0100 END:STANDARD BEGIN:DAYLIGHT DTSTART:20000326T030000 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=3 TZNAME:CEST TZOFFSETFROM:+0100 TZOFFSETTO:+0200 END:DAYLIGHT END:VTIMEZONE BEGIN:VEVENT UID:pretalx-eu-summit-2026-K9TL88@cfp.riscv-europe.org DTSTART;TZID=CET:20260609T132000 DTEND;TZID=CET:20260609T133000 DESCRIPTION:New RISC-V CPU cores are released every year\, and while these cores typically conform to standardized RISC-V ISA profiles\, vendors freq uently introduce additional proprietary extensions. This growing diversity makes it difficult for developers to accurately determine the exact instr uction sets supported by a specific CPU core\, thereby complicating the se lection of appropriate toolchains\, firmware\, and operating system images . The RuyiSDK Package Manager addresses this challenge by aggregating info rmation on RISC-V CPUs\, MCUs\, and development boards together with their corresponding toolchains\, firmware\, and system images. It establishes a comprehensive mapping between CPU architectures\, development boards\, an d required software resources. This mapping is maintained in a structured packages index\, which provides a unified\, metadata-driven representation of RISC-V hardware and software resources\, along with associated downloa d links. This paper presents the overall architecture and design of the Ru yiSDK Package Manager\, focusing on three core components: package managem ent\, virtual environment isolation\, and device provisioning. The system currently supports most commercially available RISC-V development boards. Beyond toolchain integration\, it lays the foundation for IDE integration and other developer utilities. By streamlining access to software resource s and standardizing development workflows\, the system lowers the barrier to entry for RISC-V software development\, facilitates developer onboardin g\, and improves visibility into software support across heterogeneous RIS C-V platforms. DTSTAMP:20260522T162445Z LOCATION:Poster Island D SUMMARY:RuyiSDK Package Manager - A Unified Package Management and Developm ent Environment for RISC-V - Weilin Cai\, Yunxiang Luo URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/K9TL88/ END:VEVENT BEGIN:VEVENT UID:pretalx-eu-summit-2026-XDQWMR@cfp.riscv-europe.org DTSTART;TZID=CET:20260609T133000 DTEND;TZID=CET:20260609T134000 DESCRIPTION:This paper presents Sail-RISCV-WASM\, which addresses three com mon limitations of existing browser-based RISC-V tools: fragmented capabil ities\, limited configurability\, and disconnected build/debug pipelines. The system uses `sail-riscv` as its semantic baseline and compiles it to W ebAssembly\, forming a three-layer architecture in a pure browser environm ent: a Sail decode/execute layer\, a toolchain layer (gas/ld/objdump)\, an d a metadata layer based on the RISC-V UDB. Based on this architecture\, t he paper defines two core workflows. The first is configuration-sensitive online encode/decode with instruction metadata navigation for cross-config uration behavior comparison. The second is an in-browser assemble-to-ELF\, execute\, and interactive debugging loop\, supporting instruction-level s tepping\, source-line stepping\, synchronized source/disassembly views\, a nd register/memory tracing. Results show that the system provides a comple te single-page flow from exploration to build to diagnosis\, with strong e xtension coverage and configuration flexibility. DTSTAMP:20260522T162445Z LOCATION:Poster Island D SUMMARY:Sail-RISCV-WASM A Browser-Native RISC-V Toolchain and Debugging Wor kbench - Mingzhu Yan\, Yunxiang Luo URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/XDQWMR/ END:VEVENT BEGIN:VEVENT UID:pretalx-eu-summit-2026-NMX7W7@cfp.riscv-europe.org DTSTART;TZID=CET:20260610T103000 DTEND;TZID=CET:20260610T104000 DESCRIPTION:The Sail RISC-V Model can generate an executable file from its formal specification\,. Currrently RISC-V tests only provides limited test cases and cannot comprehensively test your RISC-V implementation. Some ch ips may use self-developed simulators for testing\, but they cannot obtain formal verification-based guarantees like RISC-V Sail Model\, nor can the y offer full configurability. This work introduces a new test framework th at uses the RISC-V Sail Model as the ref model\, ensuring the model's comp leteness and accuracy. To improve simulation performance\, we choose to us e Pydrofoil\, which is an improved version of the Sail Model that delivers ultra-high performance. To enhance test compatibility and usability\, we provide a set of simple test interfaces (including register access\, memor y access\, etc.) and support customizing model configurations. Currently\, it has successfully integrated tests for some open-source RISC-V implemen tations. DTSTAMP:20260522T162445Z LOCATION:Poster Island A SUMMARY:An Efficient Approach to Apply the RISC-V Sail Model to Chip Verifi cation - Mingzhu Yan\, Yunxiang Luo URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/NMX7W7/ END:VEVENT BEGIN:VEVENT UID:pretalx-eu-summit-2026-C3QQBZ@cfp.riscv-europe.org DTSTART;TZID=CET:20260611T110000 DTEND;TZID=CET:20260611T111000 DESCRIPTION:The development of RISC-V technology faces challenges such as t he existence of low-quality online courses\, fragmented content\, a lack o f hierarchical and systematic course series\, insufficient online experime ntal practice environments\, and limited channels for learning Q&A. The pa per sets out to develop a standardized model for assessing the quality of RISC-V courses. In addition\, it puts forward a reconstruction method base d on course classification tags\, organized the individual video into a st ructured course series. The solution integrates a online RISC-V lab with o ffline community activities\, thereby establishing an integrated online-of fline practical teaching environment. This project has produced over 1\,00 0 original RISC-V lecture videos\, with total views exceeding 1.3 million. The experimental results demonstrate that the systematically organized co urse collections generated by this method significantly improve viewership and user engagement\, providing a systematic solution for the development of the RISC-V education ecosystem. DTSTAMP:20260522T162445Z LOCATION:Poster Island D SUMMARY:From Fragmentation to Systematization: A Standardized Quality Selec tion and Reconstruction Approach for RISC-V Courses - Fuyuan Zhang\, Yunxi ang Luo URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/C3QQBZ/ END:VEVENT END:VCALENDAR