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UID:pretalx-eu-summit-2026-HC7JS8@cfp.riscv-europe.org
DTSTART;TZID=CET:20260610T121500
DTEND;TZID=CET:20260610T123000
DESCRIPTION:RIVIERA core\, developed within Chips-JU TRISTAN Project\, is a
  valid alternative to State-of-Art DSP architectures used in NFC Readers d
 ownlink signal processing. Instead of relying on custom hardware\, RIVIERA
  employs an open source RISC-V core and its ISA extension interface to imp
 lement a software defined-radio (SDR) architecture\, thus moving processin
 g to the extreme edge of an NFC communication system. The first RIVIERA pr
 ototype targets decoding of NFC Type A tags responses and is ready by-desi
 gn to cover other NFC standards and rates. By replacing hardened logic fun
 ctions with SW data processing supported by a general-purpose DSP accelera
 tor\, RIVIERA reduces pre-silicon engineering effort\, enables continuous 
 post silicon improvements\, and facilitates portability across SoCs design
 s and technology nodes. This work demonstrates how application-specific cu
 stom RISC V ISA extensions can effectively and efficiently handle RF baseb
 and workloads\, paving the way for the adoption of SDR architectures in RF
  communications for the IoT mass market.
DTSTAMP:20260522T162342Z
LOCATION:Plenary
SUMMARY:RIVIERA: A Programmable RISC V Edge Architecture for NFC Signal Pro
 cessing - Luca Lingardo
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/HC7JS8/
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