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UID:pretalx-eu-summit-2026-SFGFJE@cfp.riscv-europe.org
DTSTART;TZID=CET:20260610T103000
DTEND;TZID=CET:20260610T104000
DESCRIPTION:RISC-V-based microcontroller units (MCUs) are increasingly adop
 ted in radiation-heavy environments such as space\, where single-event ups
 ets (SEUs) can cause bit-flips in sequential and combinational logic. RISC
 -V-based designs are ideally suited for these domains\, as open architectu
 res allow for fault-tolerance modifications\, enhancing readiness for arch
 itectures and systems-on-chip (SoCs). While component-level architectural 
 protection methods\, such as error correction codes (ECC) and triple modul
 ar redundancy (TMR)\, can individually harden each component\, they leave 
 critical gaps: the voters\, encoders\, and decoders that implement these p
 rotections themselves remain unprotected and become single points of failu
 re.\nWe propose an overlapping protection approach that addresses this fun
 damental “who checks the checker?” problem. By extending each protecti
 on domain to encompass the checking logic of adjacent domains\, we achieve
  end-to-end fault tolerance across an entire RISC-V MCU without requiring 
 radiation-hardened standard cells. We build on croc\, an open-source\, ext
 ensible RISC-V MCU platform based on the CVE2 core\, incrementally applyin
 g ECC-protected SRAM\, triple-core lockstep cores\, a reliable OBI interco
 nnect\, and TMR peripherals.\nFault injection campaigns in both RTL and sy
 nthesized netlist show that the fully protected RISC-V MCU achieves over 9
 9.9% fault coverage at 2.71× area overhead\, 22% less than fine-grained t
 riplication. Critically\, without overlapping protection\, 16.33% of fault
 s in voter signals cause failures\; with overlapping\, this drops to 0.26%
 . All designs are implemented using the fully open-source IHP 130nm techno
 logy\, Yosys\, and OpenROAD.
DTSTAMP:20260522T162359Z
LOCATION:Poster Island D
SUMMARY:Who Checks the Checker? End-to-End Architectural SEU Tolerance for 
 RISC-V Microcontroller Protection - Michael Rogenmoser
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/SFGFJE/
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