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UID:pretalx-eu-summit-2026-9S7HBH@cfp.riscv-europe.org
DTSTART;TZID=CET:20260609T135000
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DESCRIPTION:Memory zeroing is a common operation for enforcing system secur
 ity. Zeroing is used to clear memory contents to prevent information leaka
 ge and initialise memory contents to prevent uninitialized memory access. 
 Vendors such as Intel and ARM support fast memory zeroing instructions to 
 improve system performance efficiency. The cache management operation (CMO
 ) extension has also been recently been added to RISC-V which can be used 
 for improving memory zeroing performance. Compared to the standard systems
 \, memory zeroing is more frequently used in capability systems such as CH
 ERI to prevent capability leakage. In this work\, we evaluate different me
 mory zeroing strategies on CHERI\, and implement hardware support for impr
 oving the performance and efficiency of memory zeroing on CHERI-Toooba: a 
 CHERI-extended RISC-V CPU.
DTSTAMP:20260522T162439Z
LOCATION:Poster Island A
SUMMARY:The art of zeroing on CHERI RISC-V systems - Yuecheng Wang
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/9S7HBH/
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