YUNGANG BAO
Yungang Bao is a professor of Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) and the deputy director of ICT, CAS. Prof. Bao co-founded Beijing Institute of Open Source Chip (BOSC). His research interests include computer architecture and computer systems. He is leading the XiangShan project, which aims to build an open-source high performance RISC-V core. He launched the One Student One Chip (OSOC) Initiative in 2019. His work was published on top conferences and journals such as ASPLOS, Communication of the ACM, HPCA, ISCA, MICRO etc. and was selected to IEEE Micro Top Picks. He was the winner of RISC-V International Technical Leadership Award, CCF-Intel Young Faculty Award of the year for 2013 and the winner of CCF-IEEE CS Young Computer Scientist Award and China’s National Lofty Honor for Youth under 40 of the year for 2019.
Session
XiangShan is an open-source high-performance RISC-V processor project launched in 2020. After six years of development, XiangShan has become the most active open-source hardware project internationally, with over 7,000 Stars and 900 Forks on GitHub. XiangShan is the highest-performance open-source RISC-V processor core in the world. The third-generation core, Kunminghu (KMH), supports RVA23 Profile and achieves a measured performance of 16.5 points/GHz on SPECCPU2006, reaching the level of ARM Neoverse‑N2 and meeting the requirements of data center and AI application scenarios. More importantly, XiangShan has achieved product‑level delivery and large‑scale deployment. Multiple companies have successfully taped out chips based on XiangShan and deployed them at scale, with shipments reaching 50,000 units. This talk introduces how XiangShan accelerates its iteration through agile design and achieves product‑level delivery quality through agile verification.