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UID:pretalx-eu-summit-2026-MUFY8Z@cfp.riscv-europe.org
DTSTART;TZID=CET:20260610T173000
DTEND;TZID=CET:20260610T174500
DESCRIPTION:Addressing ever-larger amounts of memory is a fact of (computer
 ized) life. The authors of the RISC-V unpriviledge specification did recog
 nize that and coined on less than one and a half page what could be a natu
 ral extension to 128-bit of the  32- and 64-bit RISC-V ISA. Given this RV1
 28I draft\, we (a) defined an ELF128 extension for binaries\, (b) made gnu
 -based a cross-compilation environment able to use RV128I instructions and
  generate ELF128 binaries\, (c) added support for this extension and ELF12
 8 in QEMU\, (d) added the necessary instructions and resources in the CVA6
  processor.
DTSTAMP:20260522T162347Z
LOCATION:Plenary
SUMMARY:A Proof-of-Concept RISC-V with 128-bit Extension - Frédéric Pétrot
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/MUFY8Z/
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