Floating-point unit (FPU) verification is inherently challenging due to IEEE-754 corner cases, multiple rounding modes, exception handling, subnormal behavior, and the large input space introduced by mixed precision. The CORE-V Floating-Point Unit (CVFPU) released as open source, provides a highly configurable multi-format implementation but lacks an industrial-grade functional verification framework. This work addresses that gap by proposing a structured UVM-based verification strategy tailored to its configurable architecture. The approach integrates a variable-precision C++ reference model, directed and constrained-random stimulus, assertion-based checks, and coverage-driven closure.