As RISC-V moves from experimental silicon to mass-market industrial applications, the availability of proven, safety-certified Real-Time Operating Systems (RTOS) is a key enabler for adoption. Eclipse ThreadX (formerly Azure RTOS) has long been a cornerstone of the embedded industry. Yet, its immature support for the RISC-V ISA, particularly 64-bit implementations, remained a barrier for high-performance adoption.

In this session, you will learn how 10xEngineers, in collaboration with the Eclipse ThreadX project team, brought first-class RISC-V support to the ThreadX kernel. You will go on a deep dive into the architectural challenges of porting the kernel's core components to both RV32 and RV64, including context switching, interrupt nesting, and timer management tailored for the RISC-V privileged architecture. You will also explore the practical enablement of this port on the SpacemiT K1 SoC (Banana Pi BPI-F3), bridging the gap between virtual prototyping in QEMU and physical hardware deployment. Finally, you will gain insights into the low-level kernel modifications required for RISC-V compliance and discover a roadmap for deploying ThreadX in the next generation of RISC-V embedded systems.

The RISC-V instruction set architecture (ISA) has seen rapid adoption over the past few years. Despite
this growth, the software ecosystem remains a major challenge to broader adoption. In contrast to x86 and ARM platforms, where precompiled binaries are widely available, RISC-V developers often face a significant software availability gap. Consequently, many packages, libraries, or applications must be built from source, requiring substantial expertise in build systems and target architectures. This process is largely manual and time-consuming, creating a significant barrier to widespread adoption of the RISC-V. To address this critical gap, this paper presents ATESOR, a multi-stage LLM-based framework for autonomous RISC-V software porting. The framework uses large language models to plan build requirements, compile packages, debug failures, and test generated binaries in RISC-V sandboxed environments. ATESOR supports both containerized RISC-V environment and native execution on RISC-V hardware such as the Banana Pi BPI-F3 and Milk-V Pioneer, provided by Cloud-V. ATESOR is trained on an internal dataset of more than 500 manually ported packages spanning build systems including CMake, Make, Ninja, and Go. For 100 CMake and Go-based packages, ATESOR demonstrated a 80% successful porting rate and experiment completed in approximately 1.5 hours, corresponding to an average porting time of about 54 seconds per package.