David de Rosier
David is a software engineer and system architect working in correctness - and latency-critical systems. His background spans academic research in parallel computing, low-level programming in RISC-V and MIPS assembly and embedded C and Rust, and active involvement in both the Rust and RISC-V communities as a speaker and mentor. He is a member of the Safety Critical Rust Consortium.
Session
Rust is increasingly discussed in embedded and safety-aware systems, yet it remains uncommon in serious RISC-V projects. For teams working in C and assembly, the question is whether Rust meaningfully complements the RISC-V ecosystem at all.
This talk offers an engineering-level exploration of that question. Rather than a migration guide or code-heavy tutorial, it examines where Rust aligns with low-level RISC-V work - and where real friction remains.
Topics include:
- How Rust’s abstractions translate in bare-metal contexts,
- Toolchain realities, including LLVM constraints and custom ISA extension workflows,
- Practical limits around vector extension,
- Incremental adoption strategies for mixed C/Rust systems,
- Build reproducibility and multi-target configuration,
- Off-hardware testing and separation of logic from hardware layers.
The goal is to give engineers enough practical insight to judge whether Rust has a place in their RISC-V workflow. This is an exploratory talk, not a language tutorial - no prior Rust experience is required or assumed.