BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//pretalx//cfp.riscv-europe.org//eu-summit-2026//speaker//SNKFYT
BEGIN:VTIMEZONE
TZID:CET
BEGIN:STANDARD
DTSTART:20001029T040000
RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10
TZNAME:CET
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
END:STANDARD
BEGIN:DAYLIGHT
DTSTART:20000326T030000
RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=3
TZNAME:CEST
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
END:DAYLIGHT
END:VTIMEZONE
BEGIN:VEVENT
UID:pretalx-eu-summit-2026-SFZSB9@cfp.riscv-europe.org
DTSTART;TZID=CET:20260609T142000
DTEND;TZID=CET:20260609T143000
DESCRIPTION:Rust is increasingly discussed in embedded and safety-aware sys
 tems\, yet it remains uncommon in serious RISC-V projects. For teams worki
 ng in C and assembly\, the question is whether Rust meaningfully complemen
 ts the RISC-V ecosystem at all.\n\nThis talk offers an engineering-level e
 xploration of that question. Rather than a migration guide or code-heavy t
 utorial\, it examines where Rust aligns with low-level RISC-V work - and w
 here real friction remains.\n\nTopics include:\n- How Rust’s abstraction
 s translate in bare-metal contexts\,\n- Toolchain realities\, including LL
 VM constraints and custom ISA extension workflows\,\n- Practical limits ar
 ound vector extension\,\n- Incremental adoption strategies for mixed C/Rus
 t systems\,\n- Build reproducibility and multi-target configuration\,\n- O
 ff-hardware testing and separation of logic from hardware layers.\n\nThe g
 oal is to give engineers enough practical insight to judge whether Rust ha
 s a place in their RISC-V workflow. This is an exploratory talk\, not a la
 nguage tutorial - no prior Rust experience is required or assumed.
DTSTAMP:20260522T162439Z
LOCATION:Poster Island D
SUMMARY:Rust on RISC-V: Alignment and Friction at the Hardware-Software Bou
 ndary - David de Rosier
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/SFZSB9/
END:VEVENT
END:VCALENDAR
