We present a coverage-driven framework that optimizes RISC-V smoke regressions by decomposing VCS coverage into feature-specific subsets via tag-based pattern matching, ranking tests via greedy set cover, and flagging runtime outliers. Applied to a 978-test production suite drawn from a larger regression pool of 10,000 tests, the framework cut smoke tests by 40% and peak test runtime by 63%, while improving coverage on key architectural features-including +64% (SMRNMI), +53% (timer), and +25% (counters)-with modest regressions on a few features (median <3%), all within project thresholds.

Writing verification stimulus for RISC-V processors requires deep expertise across ISA specifications, microarchitectural implementation, and test framework APIs. We present an LLM-driven multi-agent framework that transforms a brief natural-language scenario description into a comprehensive, executable RISC-V test generator. Five specialized AI agents form a sequential enrichment
pipeline: an ISA expert expands intent into architecturally complete scenarios, an RTL analyst reads hardware source code to inject microarchitecture-targeted stress patterns, a framework specialist maps steps to concrete API calls, a builder synthesizes deployable code, and a validator ensures correctness through static checks and instruction-set-simulator execution. On the RISC-V Svadu extension, a 3-line scenario yields 490 lines of validated, simulation-passing code in under 13 minutes—a ∼40× speedup versus an estimated∼8 hours of manual effort.

Verifying modern RISC-V cores requires qualifying every merge request (MR) against a large and evolving test space spanning ISA extensions, micro-architectural features, and system-level scenarios. Manually selecting appropriate tests for each MR is time-consuming and error-prone, and does not scale with the rate of RTL changes. This work presents an AI-driven testlist generator that automatically derives MR-specific regression lists for a production RISC-V core verification environment. The tool analyzes Git diffs for an MR, infers impacted features using a combination of static rules and large language models (LLMs), and synthesizes targeted regressions across multiple test generators. The resulting flow reduces MR-qualification effort, improves repeatability, and provides a concrete path toward coverage-driven, closed-loop test selection for RISC-V core verification.