As the NIST Lightweight Cryptography (LWC) standard, ASCON is pivotal for securing IoT ecosystems. This work presents CHIMERA, a multipurpose cryptographic engine for RISC-V, supporting AEAD and Hashing. We propose two architectural paradigms integrated via the Core-V eXtension Interface (CV-X-IF): a high-performance Complete Round (CR) version utilizing a state-register bank, and a minimalist Bitwise Rotation Unit (BRU) version focusing on Instruction Set Extensions (ISE). Our designs suit throughput-critical workloads, delivering up to 6x speed-up, as well as footprint-constrained deployments on ASIC and FPGA.