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UID:pretalx-eu-summit-2026-ADHZLM@cfp.riscv-europe.org
DTSTART;TZID=CET:20260611T112000
DTEND;TZID=CET:20260611T113000
DESCRIPTION:The transputer is a famous High Performance Computing (HPC) arc
 hitecture from the late 1980s/early 1990s\, with Inmos being arguably the 
 most famous example. Embodying a communication-centric\, distributed-memor
 y MIMD architecture designed explicitly for scalable parallel process netw
 orks\, there are numerous potential efficiency advantages to this approach
 . In a world where scientific programmers are ever demanding more performa
 nce\, but having to balance this with energy efficiency\, this approach is
  worth another look. The Esperanto ET-SoC-1 was a 1\,088-core RISC-V manyc
 ore accelerator organised around a mesh network-on-chip (NoC) with hierarc
 hical cache and scratchpad memory structures. Purchased and released by th
 e AI foundry who are focussed on open source\, they are emphasising the tr
 ansputer credentials of the architecture. In this abstract and associated 
 poster we provide and independent exploration around how parallel code wri
 tten for a T800 transputer array may be systematically mirrored onto the E
 T-SoC-1 compute fabric. We identify architectural similarities and highlig
 ht key divergences.
DTSTAMP:20260522T163128Z
LOCATION:Poster Island B
SUMMARY:Revisiting Transputers with RISC-V - Rich Neale
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/ADHZLM/
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