Showcasing the ARCANE In-Cache computing IP into a RISC-V Linux system
2026-06-11 , Devzone

The increasing computational demands characteristic of contemporary deep learning models, particularly those associated with computer vision tasks employing Vision Transformers, present considerable constraints for energy-limited smart devices and edge computing platforms. To address this challenge, we demonstrate a RISC-V SoC that incorporates ARCANE, a 512KiB compute-capable Last-Level Cache, which enables In-Cache Computing (ICC). This capability is crucial for substantially mitigating the energy and latency overheads linked to data movement between the central processing unit (CPU) and main memory—a primary architectural bottleneck. To validate the system's operational maturity, we deploy models such as the 22-million parameter DINOv2-S and the lightweight MobileNetV2 utilizing the TVM framework. This deployment serves to demonstrate the platform's capacity to efficiently execute both state-of-the-art, computationally intensive computer vision workloads and standard image classification tasks within a unified environment. The system, instantiated on a ZCU104 FPGA featuring 1GiB of DDR4 memory, operates at a clock frequency of 80MHz and furnishes a Linux operating environment complete with a dedicated suite of user applications. These applications provide quantitative evidence of the significant performance advantages conferred by ARCANE's near-memory computing paradigm when compared against CPU-only execution. By integrating a custom tensor ISA that remains transparent and lock-less to the application programmer, ARCANE establishes itself as a valuable and pioneering contribution to the RISC-V ecosystem, representing one of the first In-Cache Computing IP cores integrated into a Linux operating environment.


This demonstration showcases user interaction with a CVA6-based RISC-V Linux System-on-Chip (SoC) featuring the 512KiB ARCANE compute-capable Last-Level Cache and 1GiB DDR4 main memory, operating at 80MHz on a ZCU104 FPGA. ARCANE provides the application software programmer with a transparent, convenient, and lock-less custom tensor ISA. Users will execute demanding computer vision applications, notably Meta's DINOv2-S Vision Transformer (comprising 22 million parameters) mirroring high-performance functionalities commonly integrated into commercial smart devices. Furthermore, MobilenetV2 provides the system with image classification capabilities across a diverse range of input images. The Linux environment also furnishes a comprehensive suite of user applications specifically designed to quantitatively demonstrate the significant speed advantages conferred by In-Cache Computing in contrast to conventional CPU-only execution methodologies. This platform establishes ARCANE as a significant and highly valuable contribution to the RISC-V ecosystem. While the user interacts with the system and observes the inference results, we will present the underlying architecture of the system to the audience, address questions, and share insights into some of the technical challenges encountered during the system's development, spanning from the hardware to the application software perspective.