As RISC-V "Vector" (RVV 1.0) architectures scale, the Vector Register File (VRF) becomes a primary bottleneck in area and power. This work characterizes data residency and redundancy patterns in a distributed, long-vector VRF using the gem5 simulator. We identify two primary inefficiencies: resource fragmentation and an entropy-capacity mismatch in active data. Our evaluation of lightweight compression schemes reveals that a 2-entry dictionary-based approach consistently yields a 2.5x compression ratio of the computed vector elements. These results demonstrate that hardware-level data compaction is an interesting path for optimizing the area of future long-vector RISC-V accelerators