Mixed-criticality systems incorporating software components with different criticality levels demand strong isolation mechanisms to guarantee dependability. High-end and mid-end architectures accomplish this through rigorous temporal and spatial partitioning, backed by multiple privilege levels and memory management units. Nevertheless, low-end processors, constrained to two privilege levels, encounter difficulties in realizing effective temporal and spatial partitioning without undermining system composability. This paper presents a novel multi-context framework for low-end RISC-V processors, exploiting a lightweight hardware extension and enabling efficient temporal and spatial partitioning. The proposed approach not only guarantees robust isolation and system composability but also offers flexibility to trade off hardware and software overhead, pushing forward the state of the art in dependability for resource-constrained embedded systems.