We present our work on porting CHERI to the open-source Bao hypervisor targeting the RISC-V architecture. A preliminary evaluation of our implementation shows a 30.2% increase in code size, an additional 1 KiB of runtime memory usage, a 20% increase in boot time, and a 13.43% increase in interrupt latency. To the best of our knowledge, this is the first publicly available implementation of a hypervisor incorporating CHERI for RISC-V that supports both CHERI and the RISC-V hypervisor extension. The port is publicly available as an open-source artifact for the RISC-V and CHERI communities.