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UID:pretalx-eu-summit-2026-MARKW9@cfp.riscv-europe.org
DTSTART;TZID=CET:20260611T135000
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DESCRIPTION:FPGA lifecycle management remains tied to proprietary toolchain
 s and host architectures\, leaving RISC-V without a vendor-neutral model f
 or scalable bitstream deployment.\nA host-agnostic control-plane architect
 ure is presented that shifts lifecycle management to the operating-system 
 layer by leveraging standard Linux capabilities\, thereby decoupling deplo
 yment from specific ISAs and vendor stacks. This enables Linux-capable RIS
 C-V processors to serve as control hosts in heterogeneous FPGA systems.\nP
 rototyped on a Zynq-7000 SoC and generalizable to RISC-V platforms\, the a
 rchitecture provides a portable foundation for fleet-scale FPGA management
 .
DTSTAMP:20260522T163243Z
LOCATION:Poster Island A
SUMMARY:FPGA Lifecycle Management for RISC-V Systems - Tianhai Liu
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/MARKW9/
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