In certain scenarios computer systems have to deal with both little-endian and big-endian data regardless their native endianness. A RISC-V extension that makes it possible to remove the overhead introduced when dealing with foreign-endian data is proposed. It can be implemented with little engineering effort and negligible impact on performance and hardware resources. Preliminary results show that the extension can remove a 62% or 37% of foreign-endian data processing overhead when compared to software solutions using the base Instruction Set Architecture (ISA) or the currently available bit manipulation extensions respectively. This performance boost can benefit both new and legacy software once compiler and library support is put in place.