This work introduces a compatible acceleration approach for AES encryption that retains the standardized ISA interface while enhancing execution time for AES-128 on 32-bit processors, including the key-schedule phase. By reformulating the behavior of existing Zk instructions without altering their opcodes, we preserve binary and source compatibility with software written for Zkne, without the performance losses of having to perform key expansion only by software. The result is an integration strategy suitable for constrained IoT or automotive devices that delivers improved throughput with reduced area overhead, enabling systems to realize the intended benefits of RISC-V’s cryptographic extension without sacrificing portability and standarization.