2026-06-10 –, Poster Island C
The growing demand for near-sensor processing exposes a gap: nonlinear activation functions still fall back on the host CPU, incurring energy and latency penalties. We present TOXOS, a RISC-V CORDIC coprocessor tightly integrated into X-HEEP via the Core-V eXtension Interface, achieving up to 27× speedup over a hardware FPU (CVFPU) with minimal area overhead.
The work is published here
Ph.D. researcher in Electrical/Electronic Engineering. Experienced in reconfigurable computing for AI and ML workloads, including FPGA-based accelerator design, hardware/software co-design for embedded systems, RISC-V SoC integration, and custom accelerator interfaces. Proficient in RTL development (SystemVerilog) and embedded C, with a focus on optimizing dataflow and compute efficiency for neural network and machine learning inference/training pipelines.