Symbolic Quick Error Detection (SQED) streamlines processor verification by checking a microarchitecture-agnostic self-consistency property using bounded model checking (BMC). While effective in detecting bugs without manual property specification, SQED suffers from severe scalability limitations due to state explosion in complex designs. This paper introduces RDM-SQED to mitigate this bottleneck by reducing the resource-intensive duplicate mode with a lightweight Processor-Level Abstraction (PLA). The PLA captures software-visible behaviors through a concise set of Elementary Instructions (EIs). To further constrain the verification logic, we propose a recursive refinement algorithm that generates a minimal EI set. Experimental evaluation on an out-of-order RISC-V processor demonstrates that RDM-SQED significantly outperforms existing variants in both scalability and bug
detection efficiency, successfully identifying bugs that cause timeouts in other methods.