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UID:pretalx-eu-summit-2026-XYRVET@cfp.riscv-europe.org
DTSTART;TZID=CET:20260611T110000
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DESCRIPTION:This paper introduces the Bicameral+\, an enhanced version of t
 he Bicameral Cache\; a vector-aware memory hierarchy that separates vector
  and scalar accesses into two cache partitions tailored to the needs of ea
 ch kind of access\, improving spatial locality for vectors and eliminating
  scalar interference. The new design aims to reduce implementation complex
 ity and improve energy efficiency\, while retaining the performance improv
 ements of the original proposal\, by introducing a set associative design 
 and an alternative opportunistic dirty block management scheme. Experiment
 al results on thirteen benchmarks across various configurations show a 7x 
 area reduction and 18x energy savings\, while retaining an average 1.59x s
 peedup w.r.t a conventional cache.
DTSTAMP:20260522T163211Z
LOCATION:Poster Island B
SUMMARY:Bicameral+: re-assessing split vector and scalar cache designs for 
 increased efficiency - Borja Perez\, Aitor Echevarría
URL:https://cfp.riscv-europe.org/eu-summit-2026/talk/XYRVET/
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