The open-standard RISC-V instruction set architecture (ISA) represents a paradigm shift in processor design and development, with its modular and customizable nature enabling a new era of processors uniquely tailored to their software workload. At RISC-V Summit 2025, AWS explored the potential of hardware / software co-design in the cloud for advanced testing and simulation, enabled by scalable, cloud-based solutions that combine high-performance FPGA instances with advanced emulation capabilities. This talk will give an update on how this democratized access is accelerating innovation cycles, reducing costs, and enabling organizations of all sizes to participate in RISC-V development, and addresses how RISC-V core developers can use AWS to monetize their designs in the cloud without the need to go to silicon.